1. Field of the Invention
The invention relates to an MNOS transistor and more particularly to dual gate MNOS digital memory transistors.
2. Description of the Prior Art
MNOS transistors utilizing dual layer gate insulator structures to function as digital memories are known in the prior art. These prior art devices can generally be classified in two types. The first and older type utilizes a first layer of silicon oxide and a second layer of silicon nitride overlying the channel region. A conductive gate was then deposited overlying the silicon nitride layer to complete the transistor. If a sufficiently high potential is applied between the gate and substrate, charges would tunnel through the silicon oxide and be trapped in the silicon nitride layer. This cause the threshold of the transistor to be shifted. This shift in threshold could be utilized to represent the high and low values of the stored digital signal.
This prior art device has many undesirable characteristics among them being the reduction of the change in the threshold voltage when these devices were subjected to continuous read-write (i.e., shifting of the threshold voltage between two values) cycling. This degradation is believed to be related to the high fields to which the regions of the oxide layer near the source and drain were subjected to during writing. This difficulty was overcome by increasing the thickness of the oxide layer in the region of the drain and source. However, it was found that increasing the thickness of the oxide in this region also increased the sensitivity of the transistor to radiation.